1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and a method of fabricating an LCD device, and more particularly, to an array substrate for an in-plane switching (IPS) liquid crystal display device and a method of fabricating an in-plane switching (IPS) liquid crystal display device.
2. Discussion of the Related Art
In general, a liquid crystal display (LCD) device is driven by making use of optical anisotropy and polarization characteristics of a liquid crystal material. The LCD device commonly includes two substrates that are spaced apart and face each other, and a liquid crystal layer interposed between the two substrates. Each of the substrates includes electrodes that face each other, wherein a voltage supplied to each electrode induces an electric field perpendicular to the substrates between the electrodes. An alignment of liquid crystal molecules of the liquid crystal layer is changed by varying an intensity or direction of the applied electric field. Accordingly, the LCD device displays an image by varying light transmittance through the liquid crystal layer in accordance with the arrangement of the liquid crystal molecules. Thus, the LCD device has superior light transmittance and aperture ratio.
An LCD device that includes thin film transistors and a matrix configuration of pixel electrodes, which is referred to as an active matrix LCD device, is commonly used because of its high resolution and ability to quickly display moving images. However, the LCD device is disadvantageous due to its narrow viewing angle. To overcome the narrow viewing angle, an in-plane switching (IPS) LCD device has been developed that implements an electric field that is parallel to surfaces of the substrates.
FIG. 1 is a plan view of an array substrate for an in-plane switching (IPS) liquid crystal display (LCD) device according to the related art. In FIG. 1, a gate line 12 is formed along a first direction on a substrate 10, and a common line 16 is formed along the first direction parallel to the gate line 12. In addition, a data line 24 is formed along a second direction perpendicular to the first direction to cross the gate line 12 and the common line 16. Accordingly, the data line 24 and the gate line 12 define a pixel area P.
A thin film transistor T is formed at the crossing of the gate line 12 and the data line 24 to function as a switching element. The thin film transistor T is composed of a gate electrode 14 that is connected to the gate line 12, a source electrode 26 that is connected to the data line 24, a drain electrode 28 that is spaced apart from the source electrode 26, and a semiconductor layer 20 that is disposed between the gate electrode 14 and the source and drain electrodes 26 and 28. The source electrode 26 may have a U-shape, and may surround a part of the drain electrode 28, which may have a rod shape.
In the pixel area P, a pixel electrode 30 and a common electrode 17 are formed, wherein the pixel electrode 30 is connected to the drain electrode 28 and the common electrode 17 is connected to the common line 16. The pixel electrode 30 is composed of an extension part 30a, a plurality of vertical parts 30b, and a horizontal part 30c. The extension part 30a is connected to the drain electrode 28, and the plurality of vertical parts 30b, which are spaced apart from each other, vertically extend from the extension part 30a. The horizontal part 30c overlaps the common line 16 and is connected to the plurality of vertical parts 30b. 
The common electrode 17 includes a horizontal portion 17a and a plurality of vertical portions 17b, wherein the horizontal portion 17a overlaps the extension part 30a of the pixel electrode 30. The plurality of vertical portions 17b vertically extend from the common line 16 and are alternately arranged with the plurality of vertical parts 30b of the pixel electrode 30. The plurality of vertical portions 17b are connected to the horizontal portion 17a of the common electrode 17.
The common line 16 and the horizontal part 30c of the pixel electrode 30 form a storage capacitor C that is parallel to a liquid crystal capacitor. Accordingly, the common line 16 functions as a first storage electrode and the horizontal part 30c functions as a second storage electrode.
Although not shown in the figure, the array substrate may further include an alignment layer, which may be rubbed at an angle of about 110 degrees with respect to the gate line 12.
FIG. 2 shows voltage waveforms of a liquid crystal display device according to the related art. In FIG. 2, when a gate voltage Vg in an ON-state, a gate high voltage Vgh of about +18V is applied. When the gate voltage Vg is in an OFF-state, a gate low voltage Vgl of about −5V is applied. In addition, a data voltage Vd has an alternating polarity between Vdh to Vdl. When a thin film transistor is turned ON by the gate high voltage Vgh, a value of the data voltage Vd is transmitted to a pixel electrode, i.e., a liquid crystal capacitor, and the value of the data voltage Vg is maintained until the next gate high voltage Vgh is supplied. A common voltage Vcom may have a value within a range of about 3V to about 5V.
In general, in a normally black (NB) mode, when no voltage is supplied, a black image is displayed. However, in the liquid crystal display device including the array substrate of FIG. 1, light leakage may occur at an initial time. For example, in FIG. 1, the gate low voltage Vgl is initially supplied to the gate electrode, while the common voltage Vcom of about 3V to about 5V is also supplied to the common electrode. Thus, there is a voltage difference between the gate electrode and the common electrode, whereby light may leak between the gate electrode and the common electrode.
FIGS. 3 and 4 are enlarged plan views of region A of FIG. 1 according to the related art and show a light leakage area. FIG. 3 shows an original arrangement of liquid crystal molecules, and FIG. 4 shows an initial arrangement of the liquid crystal molecules when gate voltage is initial in an OFF-state. In FIG. 3, the liquid crystal molecules 50 are originally arranged along a rubbing direction B that is at an angle of about 110 degrees with respect to the gate line 12. In FIG. 4, when the gate voltage is initially in an OFF-state, there is a voltage difference between the gate electrode 14 and the common electrode 17 due to the gate low voltage and the common voltage. Thus, an electric field is induced between the gate electrode 14 and the common electrode 17. The gate electrode 14 and the common electrode 17 have inclined sides that are parallel to the rubbing direction B. Accordingly, the liquid crystal molecules 50 between the gate electrode 14 and the common electrode 17 are arranged along the electric field E perpendicular to the rubbing direction B, while other liquid crystal molecules 50 are arranged along the rubbing direction B. Thus, light leakage occurs between the gate electrode 14 and the common electrode 17. In order to prevent the light leakage, a black matrix may shield the portion between the gate electrode 14 and the common electrode 17. However, light may be transmitted within the portion of the gate electrode 14 and the common electrode 17 due to misalignment between the two substrates of the liquid crystal display device, thereby making it difficult to achieve a display device displaying high quality images.